����JFIF��H�H����Exif��MM�*���� ��3����V�����3������3�(��������������������3�����
Server IP : 74.208.127.88 / Your IP : 216.73.216.63 Web Server : Apache/2.4.41 (Ubuntu) System : Linux ubuntu 5.4.0-163-generic #180-Ubuntu SMP Tue Sep 5 13:21:23 UTC 2023 x86_64 User : www-data ( 33) PHP Version : 7.4.3-4ubuntu2.29 Disable Function : pcntl_alarm,pcntl_fork,pcntl_waitpid,pcntl_wait,pcntl_wifexited,pcntl_wifstopped,pcntl_wifsignaled,pcntl_wifcontinued,pcntl_wexitstatus,pcntl_wtermsig,pcntl_wstopsig,pcntl_signal,pcntl_signal_get_handler,pcntl_signal_dispatch,pcntl_get_last_error,pcntl_strerror,pcntl_sigprocmask,pcntl_sigwaitinfo,pcntl_sigtimedwait,pcntl_exec,pcntl_getpriority,pcntl_setpriority,pcntl_async_signals,pcntl_unshare, MySQL : OFF | cURL : ON | WGET : ON | Perl : ON | Python : OFF | Sudo : ON | Pkexec : ON Directory : /usr/lib/modules/5.4.0-216-generic/build/arch/alpha/include/asm/ |
Upload File : |
/* SPDX-License-Identifier: GPL-2.0 */ #ifndef __ALPHA_PCI_H #define __ALPHA_PCI_H #ifdef __KERNEL__ #include <linux/spinlock.h> #include <linux/dma-mapping.h> #include <linux/scatterlist.h> #include <asm/machvec.h> /* * The following structure is used to manage multiple PCI busses. */ struct pci_iommu_arena; struct page; /* A controller. Used to manage multiple PCI busses. */ struct pci_controller { struct pci_controller *next; struct pci_bus *bus; struct resource *io_space; struct resource *mem_space; /* The following are for reporting to userland. The invariant is that if we report a BWX-capable dense memory, we do not report a sparse memory at all, even if it exists. */ unsigned long sparse_mem_base; unsigned long dense_mem_base; unsigned long sparse_io_base; unsigned long dense_io_base; /* This one's for the kernel only. It's in KSEG somewhere. */ unsigned long config_space_base; unsigned int index; /* For compatibility with current (as of July 2003) pciutils and XFree86. Eventually will be removed. */ unsigned int need_domain_info; struct pci_iommu_arena *sg_pci; struct pci_iommu_arena *sg_isa; void *sysdata; }; /* Override the logic in pci_scan_bus for skipping already-configured bus numbers. */ #define pcibios_assign_all_busses() 1 #define PCIBIOS_MIN_IO alpha_mv.min_io_address #define PCIBIOS_MIN_MEM alpha_mv.min_mem_address /* IOMMU controls. */ /* TODO: integrate with include/asm-generic/pci.h ? */ static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) { return channel ? 15 : 14; } #define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index static inline int pci_proc_domain(struct pci_bus *bus) { struct pci_controller *hose = bus->sysdata; return hose->need_domain_info; } #endif /* __KERNEL__ */ /* Values for the `which' argument to sys_pciconfig_iobase. */ #define IOBASE_HOSE 0 #define IOBASE_SPARSE_MEM 1 #define IOBASE_DENSE_MEM 2 #define IOBASE_SPARSE_IO 3 #define IOBASE_DENSE_IO 4 #define IOBASE_ROOT_BUS 5 #define IOBASE_FROM_HOSE 0x10000 extern struct pci_dev *isa_bridge; extern int pci_legacy_read(struct pci_bus *bus, loff_t port, u32 *val, size_t count); extern int pci_legacy_write(struct pci_bus *bus, loff_t port, u32 val, size_t count); extern int pci_mmap_legacy_page_range(struct pci_bus *bus, struct vm_area_struct *vma, enum pci_mmap_state mmap_state); extern void pci_adjust_legacy_attr(struct pci_bus *bus, enum pci_mmap_state mmap_type); #define HAVE_PCI_LEGACY 1 extern int pci_create_resource_files(struct pci_dev *dev); extern void pci_remove_resource_files(struct pci_dev *dev); #endif /* __ALPHA_PCI_H */